sycan.components.blocks.opamp¶
Op-amp models packaged as SubCircuit instances.
Two flavours are offered:
OPAMP— ideal single-VCVS (infinite bandwidth, zero output impedance).OPAMP1— first-order model with finite gain-bandwidth product and optional output impedance.
Higher-fidelity op-amp models (slew limit, input offset, etc.) can be
added as additional SubCircuit subclasses.
Classes
|
Ideal single-VCVS op-amp. |
|
First-order op-amp with finite gain-bandwidth product and output Z. |
- class sycan.components.blocks.opamp.OPAMP(name, in_p, in_n, out, A=None)[source]¶
Bases:
SubCircuitIdeal single-VCVS op-amp.
- Parameters:
name (str) – Instance designator (e.g.
"X1").in_p (str) – Parent-scope nodes wired to the non-inverting input, inverting input, and output pin respectively.
in_n (str) – Parent-scope nodes wired to the non-inverting input, inverting input, and output pin respectively.
out (str) – Parent-scope nodes wired to the non-inverting input, inverting input, and output pin respectively.
A (Optional[cas.Expr]) – Open-loop voltage gain. Defaults to a per-instance symbol
A_<name>so thatA -> oolimits recover the ideal closed-loop behaviour.
- class sycan.components.blocks.opamp.OPAMP1(name, in_p, in_n, out, A=None, GBW=None, Z_out=None)[source]¶
Bases:
SubCircuitFirst-order op-amp with finite gain-bandwidth product and output Z.
Builds a single-pole dominant-pole model:
H(s) = A · ω_p / (s + ω_p) with ω_p = 2π·GBW / A
followed by an optional series output impedance
Z_out.- Parameters:
name (str) – Instance designator.
in_p (str) – Parent-scope nodes.
in_n (str) – Parent-scope nodes.
out (str) – Parent-scope nodes.
A (Optional[Value]) – DC open-loop gain (defaults to
A_<name>).GBW (Optional[Value]) – Gain-bandwidth product in Hz (default
None= ideal, infinite bandwidth).Z_out (Optional[Value]) – Output impedance in Ω (default
None= 0).