sycan.components.basic.port¶
Port marker (single-ended or differential).
A Port is a label, not a circuit element: it records a name,
a pair of nodes (n_plus, n_minus) and an optional role
("input", "output" or "generic"). It contributes nothing
to the MNA stamps; the solve_impedance() analysis uses
it to pick an injection point and to auto-terminate the other ports
(input ports default to short, output ports to open).
Classes
|
- class sycan.components.basic.port.Port(name: 'str', n_plus: 'str', n_minus: 'str' = '0', role: 'str' = 'generic', *, include_noise: 'NoiseSpec' = None)[source]¶
Bases:
Component- Parameters:
name (str)
n_plus (str)
n_minus (str)
role (str)
include_noise (None | str | list[str] | tuple[str, ...] | frozenset[str])
- name: str¶
- n_plus: str¶
- n_minus: str = '0'¶
- role: str = 'generic'¶
- include_noise: None | str | list[str] | tuple[str, ...] | frozenset[str] = None¶
- ports: ClassVar[tuple[str, ...]] = ('n_plus', 'n_minus')¶
- has_aux: ClassVar[bool] = False¶
- SUPPORTED_NOISE: ClassVar[frozenset[str]] = frozenset({})¶
- stamp(ctx)[source]¶
- Parameters:
ctx (StampContext)
- Return type:
None